Palanir Deeksha Bhat

Palanir Deeksha Bhat

Design/verification Engineer
Bangalore, Karnataka | Others
Education : Other
Working for : Infineon Technologies AG
Post : Master Thesis Student At Infineon Technologies AG
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Female Graduate
Educational Qualifitication
Last updated on 2016-12-23 01:02:49
Palanir Deeksha Bhat completed her graduation Other from Masters In Germany, Bachelors In India (Electronics), in the year of 2016
Account and Control
Professional Area
Last updated on 2016-12-23 01:02:49
Palanir Deeksha Bhat is Design/Verification Engineer and have 2 years of work experience
Currently working as Master Thesis Student At Infineon Technologies AG at Infineon Technologies AG
Tools
Key Skills
Last updated on 2016-12-23 01:02:49
SYSTEMVERILOG UVM METHOLOGY FOR VE.. VERILOG AND VHDL
are one of expert skill area's of Palanir Deeksha Bhat .
Engineering
Industry of Work
Last updated on 2016-12-23 01:02:49
Palanir Deeksha Bhat is working in Others industry.
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Location
Last updated on 2016-12-23 01:02:49
Palanir Deeksha Bhat belong to Bangalore, Karnataka and now living in Bangalore
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SYSTEMVERILOG
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